The present invention relates generally to amplifiers, and more particularly to low noise operational amplifiers having fast settling of the output signal and low input offset voltages.
To achieve low noise in operational amplifiers, it is necessary to minimize the number of circuit elements that contribute noise in the first stage (i.e., the input stage) of the operational amplifier. Typically, the main noise contributors are the two input transistors which constitute the differential input transistor pair of the input stage. In addition to the input transistors, the input stage of a typical low noise operational amplifier also contains load devices, which typically are large-value resistors. However, the resistive load resistors cannot provide sufficiently high voltage gain and often are replaced by active load devices, typically transistors of a current mirror circuit or other symmetrical current source circuitry. In order to minimize noise in the operational amplifier, the transistors used as the active load devices should have much lower transconductance than the transconductance of the input differential transistor pair. In other words, the active load transistors should be heavily degenerated, for example by using long-channel MOS transistors or by using emitter or source degeneration resistors connected in series with the active load transistors. To achieve low input offset voltages in operational amplifiers, it often is necessary to implement both the first (input) stage and the second stage as differential amplifiers and to make the first stage as symmetrical as possible. With symmetrical active load transistors or other symmetrical active load circuitry, the common mode operating point of the first stage of the operational amplifier is usually set by common mode feedback generated by the second stage and applied to a common mode control input of the active load circuitry. An example of a typical implementation of common mode feedback can be found on page 641 a “Design of Analog Integrated Circuits and Systems” by K. R. Laker and W. Sansen. FIG. 1 herein shows a simplified version of such a circuit, a more generalized version of which is shown in FIG. 2.
Referring to prior art FIG. 1, operational amplifier 1 includes an input stage 4 including a P-channel JFET input transistor Q1 having its gate connected to Vin− and its source connected to a tail current source I0 and to the source of a P-channel JFET input transistor Q2 having its gate connected to Vin+. The drain of input transistor Q1 is connected by conductor 2A to the collector of an NPN active load transistor Q3 and to one terminal of a compensation capacitor C2, the other terminal of which is connected to ground. The drain of input transistor Q2 is connected by conductor 2B to the collector of an NPN active load transistor Q4. The bases of active load transistors Q3 and Q4 are connected to a common mode feedback conductor 3. The emitters of active load transistors Q3 and Q4 are coupled to ground by degeneration resistors R0 and R1, respectively.
A second stage 8 of operational amplifier 1 includes emitter-coupled NPN input transistors Q5 and Q6, the emitters of which are connected to common mode feedback conductor 3 and to a tail current source 14. The collector of input transistor Q5 is connected to the collector and base of a diode-connected PNP active load transistor Q7 and to the base of a PNP active load transistor Q8. The emitters of active load transistors Q7 and Q8 are connected to VDD. The collector of input transistor Q6 is connected by output conductor 13 to Vout and to the collector of active load transistor Q8. One terminal of a compensation capacitor C3 is connected to output conductor 13, and its other terminal is connected to the base of input transistor Q6. The bases of transistors Q5 and Q6 are connected to conductors 2A and 2B, respectively.
FIG. 2 is a generalized block diagram of the prior art operational amplifier 1 of FIG. 1, wherein the input stage 4 in FIG. 2 includes input stage differential transistor pair 5 (which can be input transistors Q1 and Q2 of FIG. 1). Input stage differential transistor pair 5 is coupled by conductors 2A and 2B to control the active load circuit 6 and to the inputs of a second stage differential transistor pair 7 (which can be input transistors Q5 and Q 6 of FIG. 1). Second stage differential transistor pair 7 is coupled to a current mirror 8 which constitutes an active load circuit. Second stage differential transistor pair 7 produces a common mode feedback signal to control the active load circuit 6 by means of conductor 3.
There is a problem associated with the circuit shown in FIG. 2, in that the combination of common mode feedback between the input stage 4 and the second stage 8 with heavy degeneration of the input stage active load circuitry 6 causes slow settling of Vout in response to an input step signal. In the circuit shown in FIG. 2, the bandwidth of the common mode feedback loop is determined by gm/C2, where gm is the transconductance of the active load circuitry in the input stage and C2 is the value of the Miller compensation capacitor. The transconductance of the active load transistors (or other active load circuitry) in the input stage of the operational amplifier 1 is low when the active loads are heavily degenerated in order to reduce noise and input offset voltage of operational amplifier 1. When the bandwidth of the common mode feedback loop is substantially lower than the bandwidth of the operational amplifier due to large degeneration resistances, the result is slow settling. (The base of transistor Q3 is the input to the common mode feedback loop, and the transconductance of the active load circuit in the common mode feedback loop is limited by the resistances R0 and R1.)
It is known that the operational amplifier circuitry shown in FIGS. 1 and 2 generally has the above-mentioned slow settling behavior. This is illustrated in FIG. 5A, which shows the small signal step response of the circuit shown in FIGS. 1 and 2. In FIG. 5A, curve A represents Vout when degeneration resistances R0 and R1 are small, and curve B represents Vout when R0 and R1 are large. Removing or reducing degeneration resistances R0 and R1 helps to reduce the settling times by increasing the bandwidth of the common mode feedback loop.
A type of input stage known as a “class AB” input stage can provide an output differential current that may be substantially greater than the total DC quiescent output current which a constant tail current source is capable of supplying. This can be accomplished by providing a tail current source circuit which substantially increases the tail current supplied to the differentially-coupled input transistors in response to a higher of the two input voltages which constitute the differential input signal of the class AB input stage. This results in a maximum output current of the class AB input stage which is much larger than could be supplied by a constant tail current source. Since the output current can be very high, class AB input stages typically are used in amplifiers that require very high slew rates. However, class AB input stages have the shortcomings of causing nonlinear circuit operation and generating noise.
There is an unmet need for a low noise operational amplifier having faster settling of the output signal than has been previously achieved.
It also would be desirable to have a low noise operational amplifier in which the bandwidth of the common mode feedback loop can be adjusted independently of the amount of degeneration of the active loads in the input stage of the operational amplifier.
There also is an unmet need for a low noise operational amplifier having faster settling of the output signal and lower input offset voltages than has been previously achieved.
It would be desirable to have an operational amplifier in which the common mode feedback bandwidth can be set close to the gain-bandwidth product of the operational amplifier in order to minimize the slow settling of the output voltage of the above described prior art operational amplifier and nevertheless preserve the stability of the common mode loop.
There also is an unmet need for a low noise, low THD (total harmonic distortion) operational amplifier having faster settling of the output signal than has been previously achieved.
There also is an unmet need for a low noise, low THD (total harmonic distortion) operational amplifier having a class AB input stage.